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Team Introduction

Ing-Jer Huang
Chair Professor of ASE Semiconductor & Distinguished Professor of NSYSU

Distinguished Professor
of Sun Yat-sen University
Chair Professor
of ASE Semiconductor


  • Research and development of silicon intellectual property of Yuejin microprocessors/microcontrollers
  • System chip infrastructure construction
  • Evaluation of system performance of virtual/physical platforms
  • Software and hardware technologies and systems of consumer electronics 3D graphics graphics processors Integration
Prof. Huang has extensive experience in the implementation of integrated projects:
He hosted the National Science Council and Qijing Optoelectronics integrated (six moderators) industry-university research project and actively cooperated in the development of digital TV 3D graphics accelerator.
He hosted chip system National Science and Technology Project (eight hosts) developed its high-efficiency programmable 3D computer graphics chip system with real-time performance/power monitoring function and led the team to win the Outstanding Project Award.
He further cooperated with six hosts to implement the intelligent electronic national technology plan to develop intelligent green multi-core graphics processor technology for interactive three-dimensional multi-view display systems. Has a wealth of successful experience in assisting industrial development in industry-university cooperation such as creative electronics, Shengqun Semiconductor, Zhiyuan Technology, Shangyuan Technology, calculation technology, Xinyi Technology, VIA Technology, Qijing Optoelectronics, Jinli Semiconductor, Xinhua Computer, France Temento Systems, Industrial Technology Research Institute, Hongjing Technology and other manufacturers.

 Associate Professor


  • Design and implementation of digital silicon intellectual property
  • Designing high-efficiency, low-power or real-time application VLSI circuits for the characteristics of different signal processing algorithms
He executed National Science Association and Qijing Optoelectronics integrated industry-university research project to develop a fixed pipeline 3D computer graphics accelerator.
He developed a Programmable Pixel Shader for the national technology project of the chip system.
He implemented a smart electronic national technology project research and development of Yue-type joint coloring and computing flotation and proposed an improved depth buffer compression mechanism to reduce the amount of memory bandwidth required in the 3D rendering process. In recent years, he has actively invested in the design and research of Yuejin's drawing and rendering system and cooperated with his peers and industry to complete a low-cost 3D rendering system.

Shiann-Rong Kuang Professor


  • The low-power 3D computer graphics chip system flocculation design
  • The low-power high-efficiency application-oriented integrated circuit design
  • Joint design of software and hardware
He executed the chip system National Science and Technology Project Development 3D Drawing Office. The workload prediction and simulation system and workload prediction circuit are used to predict the workload of the 3D drawing processing unit in real time, which can be used as a basis for dynamically adjusting the working voltage and frequency of the 3D drawing processing unit to further reduce the 3D drawing processing. The energy consumption of the unit; also assists the designer in evaluating the accuracy required for various operations of the 3D graphics processing unit to avoid unnecessary power consumption and waste of hardware costs.

Li-Lian Liu
Vice Dean of College of Marine Sciences of NSYSU

Professor of Department of Oceanography, NSYSU
Vice Dean of College of Marine Sciences, NSYSU



  • Biology of aquatic molluscs
  • Marine Pollution Biological Science